 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| PRELIMINARY CUSTOMER PROCUREMENT SPECIFICATION 1 Z86E64 CMOS Z8 OTP MICROCONTROLLER FEATURES Device Z86E64 ROM (KB) 32 RAM* (Bytes) 236 I/O Lines 52 Voltage Range 4.5-5V s s s s 1 All Digital Inputs are TTL Levels Auto Latches RAM and ROM Protect Two Programmable 8-Bit Counter/Timers, Each with 6-Bit Programmable Prescaler Six Vectored, Priority Interrupts from Eight Different Sources Low EMI Mode Option 68-Pin Leaded Chip-Carrier Note: *General-Purpose s s s s Low-Power Consumption: 200 mW (max) Fast Instruction Pointer: 0.75 s @ 16 MHz Two Standby Modes: STOP and HALT Full-Duplex UART s s s GENERAL DESCRIPTION The Z86E64 is a member of the Z8 single-chip microcontroller family. The Z86E64 can address both external memory and pre-programmed ROM, which enables this Z8 MCUTM to be used in high-volume applications where code flexibility is required. The Z86E64 is a pin compatible, One-Time-Programmable (OTP) version of the Z86C64. The Z86E64 contains 32 KB of EPROM memory in place of the 32 KB of ROM on the Z86C64. There are three basic address spaces available to support this wide range of configuration: Program Memory, Data Memory, and 236 general-purpose registers. The Z86E64 offers a flexible I/O scheme, an efficient register and address space structure, multiplexed capabilities between address/data, I/O, and a number of ancillary features that are useful in many industrial and advanced scientific applications. For applications demanding powerful I/O capabilities, the Z86E64's dedicated input and output lines are grouped into six ports. Each port consists of eight lines, except port 6, which has four lines. Each port is configurable under software control to provide timing, status signals, serial or parallel I/O with or without handshake, and an address/data bus for interfacing external memory. The Z86E64 offers two on-chip counter/timers with a large number of user-selectable modes, and an Universal Asynchronous Receiver/Transmitter (UART). See figure 1 forFunctional Block description. Note: All Signals with a preceding front slash, "/", are active Low, for example: B//W (WORD is active Low); /B/W (BYTE is active Low, only). Power connections follow conventional descriptions below: Connection Power Ground Circuit VCC GND Device VDD VSS CP96DZ83200 (10/96) PRELIMINARY 1 Z86E64 CMOS Z8 OTP Microcontroller GENERAL DESCRIPTION (Continued) Output Input Vcc GND XTAL /AS /DS R//W /RESET Port 3 Machine Timing and Instruction Control UART ALU Flags Counter/ Timers (2) Register Pointer Interrupt Control Register File 256 x 8-Bit Program Memory 32,768 x 8-Bit Program Counter Port 6 Port 5 Port 4 Port 2 4 I/O (Bit Programmable) Port 0 4 Port 1 8 Address/Data or I/O (Byte Programmable) I/O (Bit Programmable) Address or I/O (Nibble Programmable) Figure 1. Z86E64 Functional Block Diagram 2 PRELIMINARY CP96DZ83200 Z86E64 CMOS Z8 OTP Microcontroller PIN DESCRIPTION 7 XT AL 1 XT AL P4 2 5 VC C P4 4 P4 3 P4 2 /R es et 1 P4 P3 P3 P4 P2 7 P2 6 P2 5 60 59 58 57 56 55 54 0 6 1 P3 9 R//W /P0DS /DS P46 P47 /P1DS /AS /DTimers P35 /ROMless GND P32 P50 P51 P00 P01 P02 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 8 P3 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 P24 P23 P22 P60 P61 P21 P20 SCLK /SYNC GND P33 P34 P62 P63 P17 P16 P15 1 0 Z86E64 PLCC 53 52 51 50 49 48 47 46 45 44 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 5 P0 6 P0 7 VC C P5 2 3 P5 4 P5 5 P1 0 P1 1 P5 6 3 4 7 P1 2 P1 3 P0 P0 P5 Figure 2. Z86E64 68-Pin PLCC Pin Assignments CP96DZ83200 P0 PRELIMINARY P5 P1 4 3 Z86E64 CMOS Z8 OTP Microcontroller PIN DESCRIPTION (Continued) Table 1. Z86E64 68-Pin PLCC Pin Identification Pin # 1-2 3 4 5 6 7 8 9 10 11 12 13-14 15 16 17 18 19 20 21 22-23 24-31 32 33-36 37-38 39-40 41-46 47-48 49 50 51 52 53 54-55 56-57 58-63 64-65 66 67 68 Symbol P44-P43 VCC P45 XTAL2 XTAL1 P37 P30 /RESET R//W /P0DS /DS P47-P46 /P1DS /AS /DTIMER P35 /ROMless GND P32 P51-P50 P07-P00 VCC P55-P52 P11-P10 P56-P57 P17-P12 P63-P62 P34 P33 GND /SYNC SCLK P21-P20 P60-P61 P27-P22 P41-P40 P31 P36 P42 Function Port 4, Pins 3,4 Power Supply Port 4, Pin 5 Crystal, Oscillator Clock Crystal, Oscillator Clock Port 3, Pin 7 Port 3, Pin 0 Reset Read/Write Port 0 Data Strobe Data Strobe Port 4, Pins 6,7 Port 1, Data Strobe Address Strobe DTIMER Port 3, Pin 5 ROM/ROMless control Ground Port 3, Pin 2 Port 5, Pins 0,1 Port 0, Pins 0,1,2,3,4,5,6,7 Power Supply Port 5, Pins 2,3,4,5 Port 1, Pins 0,1 Port 5, Pins 6,7 Port 1, Pins 2,3,4,5,6,7 Port 6, Pins 3,2 Port 3, Pin 4 Port 3, Pin 3 Ground Synchronization System Clock Port 2, Pins 0,1 Port 6, Pins 1,0 Port 2, Pins 2,3,4,5,6,7 Port 4, Pins 0,1 Port 3, Pin 1 Port 3, Pin 6 Port 4, Pin 2 Direction In/Output Input In/Output Output Input Output Input Input Output Output Output In/Output Output Output Input Output Input Input Input In/Output In/Output Input In/Output In/Output In/Output In/Output In/Output Output Input Input Output Output In/Output In/Output In/Output In/Output Input Output In/Output 4 PRELIMINARY CP96DZ83200 Z86E64 CMOS Z8 OTP Microcontroller DC CHARACTERISTICS VCC = 4.5V to 5.5V TA = 0C to +70C Sym Parameter Max Input Voltage VCH VCL VIH VIL VOH VOL VRH VRl IIL IOL IIR ICC ICC1 ICC2 Max Input Voltage Clock Input High Voltage Clock Input Low Voltage Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage Reset Input High Voltage Reset Input Low Voltage Input Leakage Output Leakage Reset Input Current Supply Current Standby Current Standby Current 3.8 -0.3 -10 -10 3.8 -0.3 2.0 -0.3 2.4 0.4 VCC 0.8 10 10 -50 50 60 15 20 20 20 25 35 5 10 5 5 Min Max 7 12.5V VCC 0.8 VCC 0.8 Typical at 25C Units Conditions V V V V V V V V V V A A A mA mA mA mA A A 0V < VIN < +5.25V 0V < VIN < +5.25V VCC= +5.25V, VRL = 0V @ 12 MHz @ 16 MHz HALT Mode VIN = 0V, VCC @ 16 MHz STOP Mode VIN = 0V, VCC @ 12 MHz STOP Mode VIN = 0V, VCC @ 16MHz IOH = -2.0 mA IOL = +2.0 mA IIN <250 A P30-P33 Only in OTP mode Driven by External Clock Generator Driven by External Clock Generator 1 CP96DZ83200 PRELIMINARY 5 Z86E64 CMOS Z8 OTP Microcontroller AC CHARACTERISTICS External I/O or Memory Read or Write Timing Diagram R//W 13 12 Port 0, /DM 16 19 3 Port 1 A 1 7 -A 2 0 D 7 - D IN 0 9 /AS 8 4 5 6 18 11 /DS (Read) 17 10 Port 1 A 7 -A 0 14 D - D OUT 7 0 15 7 /DS (Write) Figure 3. External I/O or Memory Read/Write Timing 6 PRELIMINARY CP96DZ83200 Z86E64 CMOS Z8 OTP Microcontroller External I/O or Memory Read and Write Timing Table VCC = 4.5V to 5.5V 1 TA = 0C to 70C 12 MHz 16 MHz Min 20 30 220 55 0 185 110 130 0 45 55 30 35 35 35 255 55 75 50 40 60 30 0 35 30 20 30 25 30 200 35 0 135 80 75 180 Max Units ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns Notes [2,3] [2,3] [1,2,3] [2,3] [1,2,3] [1,2,3] [1,2,3] [2,3] [2,3] [2,3] [2,3] [2,3] [2,3] [2,3] [1,2,3] [2,3] [1,2,3] [2,3] Parameter Address Valid to /AS Rise Delay /AS Rise to Address Float Delay /AS Rise to Read Data Req'd Valid /AS Low Width Address Float to /DS Fall /DS (Read) Low Width /DS (Write) Low Width /DS Fall to Read Data Req'd Valid Read Data to /DS Rise Hold Time /DS Rise to Address Active Delay /DS Rise to /AS Fall Delay R//W Valid to /AS Rise Delay /DS Rise to R//W Not Valid Write Data Valid to /DS Fall (Write) Delay /DS Rise to Write Data Not Valid Delay Address Valid to Read Data Req'd Valid /AS Rise to /DS Fall Delay Data Input Setup to /DS Rise /DM Valid to /AS Fall Delay Min 35 45 Max No 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 Symbol TdA(AS) TdAS(A) TdAS(DR) TwAS TdAZ(DS) TwDSR TwDSW TdDSR(DR) ThDR(DS) TdDS(A) TdDS(AS) TdR/W(AS) TdDS(R/W) TdDW(DSW) TdDS(DW) TdA(DR) TdAS(DS) TdDI(DS) TdDM(AS) Notes: [1] When using extended memory timing add 2 TpC. [2] Timing numbers given are for minimum TpC. [3] See clock cycle dependent characteristics. Standard Test Load All timing references use 2.0V for a logic 1 and 0.8V for a logic 0. Clock Dependent Formulas Number 1 2 3 4 6 7 8 Symbol TdA(AS) TdAS(A) TdAS(DR) TwAS TwDSR TwDSW TdDSR(DR) Equation 0.40TpC + 0.32 0.59TpC - 3.25 2.38TpC + 6.14 0.66TpC - 1.65 2.33TpC - 10.56 1.27TpC + 1.67 1.97TpC - 42.5 10 11 12 13 14 15 16 17 18 19 Clock Dependent Formulas TdDS(A) TdDS(AS) TdR/W(AS) TdDS(R/W) TdDW(DSW) TdDS(DW) TdA(DR) TdAS(DS) TsDI(DS) TdDM(AS) 0.8TpC 0.59TpC - 3.14 0.4TpC 0.8TpC - 15 0.4TpC 0.88TpC - 19 4TpC - 20 0.91TpC - 10.7 0.8TpC - 10 0.9TpC - 26.3 CP96DZ83200 PRELIMINARY 7 Z86E64 CMOS Z8 OTP Microcontroller AC CHARACTERISTICS (Continued) Additional Timing Diagram 1 3 Clock 2 2 3 T IN 4 IRQ N 5 Figure 4. Additional Timing AC CHARACTERISTICS Additional Timing Table VCC = 4.5V to 5.5V TA = 0C to +70C 12 MHz No 1 2 3 4 5 6 7 8A 8B 9 Symbol TpC TrC,TfC TwC TwTinL TwTinH TpTin TrTin,TfTin TwIL TwIL TwIH Parameter Input Clock Period Clock Input Rise & Fall Times Input Clock Width Timer Input Low Width Timer Input High Width Timer Input Period Timer Input Rise & Fall Times Interrupt Request Input Low Times Interrupt Request Input Low Times Interrupt Request Input High Times Min 83 41 75 5TpC 8TpC 100 70 5TpC 5TpC Max 500 15 16 MHz Min 62.5 31 50 5TpC 8TpC 100 50 5TpC 5TpC Max 500 10 Units ns ns ns ns Notes [1] [1] [1] [2] [2] [2] [2] [2,4] [2,5] [2,3] ns ns Notes: 1. Clock timing references use 3.8V for a logic 1 and 0.8V for a logic 0. 2. Timing references use 2.0V for a logic 1 and 0.8V for a logic 0. 3. Interrupt references request via Port 3. 4. Interrupt request via Port 3 (P31-P33). 5. Interrupt request via Port 30. 8 PRELIMINARY CP96DZ83200 Z86E64 CMOS Z8 OTP Microcontroller 1 Data In Data In Valid Next Data In Valid 1 3 2 /DAV (Input) 4 Delayed DAV 5 6 RDY (Output) Delayed RDY Figure 5. Input Handshake Timing Data Out Data Out Valid Next Data Out Valid 7 /DAV (Output) 8 10 9 Delayed DAV 11 RDY (Input) Delayed RDY Figure 6. Output Handshake Timing CP96DZ83200 PRELIMINARY 9 Z86E64 CMOS Z8 OTP Microcontroller AC CHARACTERISTICS (Continued) Handshake Timing Table VCC = 4.5V to 5.5V TA = 0C to +70C 12 MHz No 1 2 3 4 5 6 7 8 9 10 11 Symbol TsDI(DAV) ThDI(DAV) TwDAV TdDAVI(RDY) TdDAVId(RDY) TdDO(DAV) TcLDAV0(RDY) TcLDAV0(RDY) TdRDY0(DAV) TwRDY TdRDY0d(DAV) Parameter Data In Setup Time Data In Hold Time Data Available Width DAV Fall to RDY Fall Delay DAV Rise to RDY Rise Delay RDY Rise to DAV Fall Delay Data Out to DAV Fall Delay DAV Fall to RDY Fall Delay RDY Fall to DAV Rise Delay RDY Width RDY Rise to DAV Fall Delay Min 0 145 110 115 115 0 TpC 0 115 110 115 110 115 0 115 0 TpC Max 16 MHz Min 0 145 110 115 115 Max Notes Data Direction IN IN IN IN IN IN OUT OUT OUT OUT OUT 10 PRELIMINARY CP96DZ83200 Z86E64 CMOS Z8 OTP Microcontroller 1 Pre-Characterization Product: The product represented by this CPS is newly introduced and Zilog has not completed the full characterization of the product. The CPS states what Zilog knows about this product at this time, but additional features or nonconformance with some aspects of the CPS may be found, Low Margin: Customer is advised that this product does not meet Zilog's internal guardbanded test policies for the specification requested and is supplied on an exception basis. Customer is cautioned that delivery may be uncertain and that, in addition to all other limitations on (c) 1996 by Zilog, Inc. All rights reserved. No part of this document may be copied or reproduced in any form or by any means without the prior written consent of Zilog, Inc. The information in this document is subject to change without notice. Devices sold by Zilog, Inc. are covered by warranty and patent indemnification provisions appearing in Zilog, Inc. Terms and Conditions of Sale only. Zilog, Inc. makes no warranty, express, statutory, implied or by description, regarding the information set forth herein or regarding the freedom of the described devices from intellectual property infringement. Zilog, Inc. makes no warranty of merchantability or fitness for any purpose. Zilog, Inc. shall not be responsible for any errors that may appear in this document. Zilog, Inc. makes no commitment to update or keep current the information contained in this document. either by Zilog or its customers in the course of further application and characterization work. In addition, Zilog cautions that delivery may be uncertain at times, due to start-up yield issues. Zilog liability stated on the front and back of the acknowledgement, Zilog makes no claim as to quality and reliability under the CPS. The product remains subject to standard warranty for replacement due to defects in materials and workmanship. Zilog's products are not authorized for use as critical components in life support devices or systems unless a specific written agreement pertaining to such intended use is executed between the customer and Zilog prior to use. Life support devices or systems are those which are intended for surgical implantation into the body, or which sustains life whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. Zilog, Inc. 210 East Hacienda Ave. Campbell, CA 95008-6600 Telephone (408) 370-8000 FAX 408 370-8056 Internet: http://www.zilog.com CP96DZ83200 PRELIMINARY 11 Z86E64 CMOS Z8 OTP Microcontroller 12 PRELIMINARY CP96DZ83200 |
Price & Availability of Z86E64
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |